There is a need for a mechanism in which a semiconductor chip can be mounted and tested as an individual unit rather than after it is incorporated in an assembly. This invention provides a structure for mounting such a semiconductor chip for determining the reliability of semiconductor chips under test by appropriate mechanisms for conducting the desired test. Under conventional chip testing, reliability is determined using two industry standard methodologies: (a) wafer probing where an array of chips on a wafer are probed at room temperature; and (b) statistical sampling with thermal stress.
Wafer probing technology has been the accepted way for chip testing where the micro-electronic devices are electrically tested at room temperature. A wafer is usually four or five inches in diameter and contains an array of several chips of the same type. After probing, the wafer is scribed (cut) and separated and the individual chips are then available for use on the production floor. Wafer probing is a static test, meaning electrical continuity between critical parts are verified, but total electrical function is not determined due to time constraints and associated cost. Thermal screening is not technically feasible since there is not a thermal forcing technique available that can rapidly cycle the large mass of a four or five inch wafer. Therefore, chip integrity is still questionable after wafer probing is evaluated only by visual inspection.
Statistical sampling is another industry accepted chip testing practice used to determine complete electrical functions and operating reliability, including MIL-SPEC temperature ranges. Under this methodology, one to two percent of the individual chips are separated from the wafer and mounted into a custom test fixture and subjected to dynamic electrical and thermal evaluation. Based upon the compiled test results, predictions are made concerning the other 98 to 99 percent of chips. The chips which are used for test purposes are not usable after mounting in the test fixture.
Therefore, for the most part, chip reliability is unknown until they are assembled into the final electrical package (usually a Hybrid Microelectronic Assembly (HMA) which is used extensively in military and space applications), and the completed HMA package is subjected to MIL-SPEC final test. At this point in the manufacturing process non-functional HMA packages must undergo labor intensive troubleshooting to determine the cause of failure, and faulty chips must be removed and replaced per MIL-SPEC procedures. In many cases the cost of repairing a faulty HMA package exceeds the cost of producing the entire package.
Accordingly, it is an object of this invention to provide a mount by which an individual chip can be accurately mounted for individual test of the chip.
Another object of this invention is to provide a mount which has two specimen holders located opposite each other so that while a specimen or chip is being tested from one mount the other mount can be loaded for testing after the first specimen is tested.
Still another object of this invention is to provide a mount that can be rotated between positions which are 180 degrees apart and accurately held in these precise positions when actuated thereto.
Still another object of this invention is to provide a mount for a test specimen in which the mount has such structure as to enable the test specimen to be quickly cycled from one test temperature to another.
Other objects and advantages of this invention will be obvious to those skilled in this art.